Learn how to simulate the EV12AQ600 ADC ESIstream serial interface using Vivado simulator and testbench available in each ESIstream package (KU FPGA, Versal ACAP…). Learn about synchronization aspects and what the overall latency is made of. EV12AQ600 ADC product webpage ESIstream web site Youtube video: G et started with the ESIstream serial interface of th…
Read MoreThis case study has been written with the Partnership of Kate Mueller from Liquid Instruments. Moku:Pro is a scalable, high-performance test solution for developing and validating next-generation devices and systems. It offers users flexibility and reconfigurability through software-defined instrumentation with 4 input and 4 output channels. Teledyne’s EV10AQ190 high speed and high precision…
Read MoreGenerate the DDR4 controller IP to interface Teledyne e2v DDR4 products with AMD Xilinx devices. In this short video, you will learn how to setup the DDR4 controller IP to interface the Teledyne e2v DDR4 products with the programmable logic of XILINX devices. Watch this short video to see in practice th…
Read MoreThis tutorial video explains how to create a Vivado project to implement ADX4 IP on a Kintex Ultrascale FPGA starting from a VHDL design example and using EV12AQ600-ADX-EVM demo board. This tutorial also delivers all steps to load the FPGA bitstream, retrieve sample data processed by the ADX4 IP using Vivado and analyze SFDR performance using a python Graphical User Interface (GUI). For more inf…
Read MoreBenefit from an immediate design-free, dynamic performance gain Newsworthy pointers • The new EV12AQ600/605-ADX4 device options now feature an integrated ADX4 license key enabling enhanced dynamics when operating at up to a peak of 6.4 GS/s (single channel mode). • ADX4 - a post-processing algorithm compatible with Xilinx Kintex…
Read MoreGet all information to accelerate your ESIstream high-speed serial interface development introducing the Versal ACAP ESIstream package based on the VCK190 Versal AI core development kit. The Versal ACAP ESIstream package will help you to get started with Versal ACAP and a high-speed data converter that uses the ESIstream serial interface, like EV12AQ600 ADC (FPGA ESIstream RX) and EV12DD700 DAC (…
Read MoreIn this series of short videos, you will learn how to program and design with the first 12-bit ADC to feature a Cross Point Switch. The Teledyne e2v EV12AQ600 can operate its four cores simultaneously, independently or paired, to assign its 6.4 GSPS sampling speed across the user’s desired channel count. This video series covers serial interface programming, how to cancel time interleaving mismatc…
Read MoreFind out in our videos how we at Teledyne e2v help our customers succeed in addressing Compute Intensive Space use cases with our radiation tolerant solutions. And discover how we perform radiation testing of our components and build our reports to provide relevant data to our customers. How does Te…
Read MoreTeledyne e2v Semiconductors adds EV12AQ600 ADC to its portfolio of high-performance data converters certified to MIL-PRF-38535 Class Y for Space applications. Grenoble, 21st March 2022 – Teledyne e2v, the leading hi-rel semiconductor solutions provider, today announces the production release of the space qualified EV12AQ600, the most advanced and versatile quad-core, multi-channel ADC in its por…
Read MoreTeledyne e2v Now Shipping Flight Models of its Space DDR4 Memory Solution Grenoble, 14th March 2022 – The progression of Teledyne e2v Semiconductors’ ultra-high density DDR4 memories continues, with news that flight models are now being shipped to key customers around the world. It signifies a major step forward in the ground-bre…
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